GENERAL Single chip ATM and Packet over SONET/SDH 8-channel Physical Layer Device operating at 155.52 Mbit/s.Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to ITU Recommendation I.432.Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to RFC 2615 and RFC 1662.Processes eight duplex bit-serial 155.52 Mbit/s STS-3c/STM-1 data streams with on-chip clock and data recovery and clock synthesis.Complies with Bellcore GR-253-CORE (2000 Issue) jitter tolerance, jitter transfer (1995 Issue) and intrinsic jitter criteria.Provides control circuitry required to comply with Bellcore GR-253-CORE WAN clocking requirements related to wander transfer, holdover and long term stability when using an external VCXO.Provides UTOPIA Level 3 compatible 32-bit wide System Interface (clocked up to 104 MHz) with parity support for ATM applications.Provides SATURN POS-PHY Level 3. 32-bit System Interface (clocked up to 104 MHz) for Packet over SONET/SDH (POS) and ATM applications.Provides support functions for 1+1 APS and 1:N operation.Provides a standard 5 signal IEEE 1149.1 JTAG test port for boundary scan board test purposes.Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring.Low power 2.5/3.3 volt CMOS with 5-volt TTL compatible digital inputs and outputs. PECL inputs and outputs are 3.3 volt and 5 volt compatible.Industrial temperature range (-40.C to +85 °C).520 pin Super BGA package.
Typical Applications include:
WAN and Edge ATM switches.LAN switches and hubs.Packet switches and hubs.Routers and Layer 3 SwitchesNetwork Interface Cards and Uplinks
Are you seeing all your results?
If you are a PMC-Sierra Customer or Partner you may have permission
to see additional results on the myPMC product page.
Please log in to the myPMC product page to check.