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RM7935/RM7965
64-bit Microprocessors with Integrated L2 Cache and EJTAG

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Version Issue Date

Product Brief

PDFRM7935/RM7965 64-bit Microprocessors with Integrated L2 Cache and EJTAG Product Brief [205 KB] PMC-2030350 2006-02-14 

Software Documentation

Locked Document, Log In RequiredDOCPMC-Sierra Mode Bits Configuration Utility Revision Finder B132  2004-11-22 
Locked Document, Log In RequiredPDFMIPS IV Instruction Set [1.01 MB] PMC-2010953 2001-05-02 

Application Note

Locked Document, Log In RequiredPDFMIPS TLB Operations - Application Note [149 KB] PMC-2031515 2004-08-12 

Features

  • New high performance MIPS64-compatible Instruction Set Architecture with integrated L2 cache and EJTAG:
    • 668, 750 and 835 MHz operating frequency.
    • 1890 Dhrystone 2.1 MIPS @ 900 MHz.
    • Dual-issue superscalar 7-stage pipeline.
    • 16 Kbyte, 4-way set associative L1 Instruction cache.
    • 16 Kbyte, 4-way set associative L1 Data cache.
    • 256 Kbyte, 4-way set associative L2 cache with industry best 5-cycle access latency.
    • Fast Packet Cache to assists processing of packet data.
    • 8K entry branch prediction table.
    • Fully associative 64-entry TLB with dual pages.
    • High-performance Floating Point Unit (IEEE 754).
    • Fixed-point DSP instructions such as Multiply/Add, Multiply/Subtract, and 3 Operand Multiply.
  • High-performance system interface:
    • 32-bit multiplexed address/data (SysAD) bus with RM7935.
    • 64-bit SysAD with RM7965.
    • Multiple outstanding reads with out-of-order return.
    • 1600 Mbyte/s peak throughput.
    • 200 MHz maximum frequency using HSTL signaling on the SysAD bus.
    • SysAD bus supports 1.5 V, 2.5 V, 3.3 V I/O logic.
    • Processor clock multipliers 2, 3, 3.5, 4, 4.5, 5, 5.5, 6, 6.5, 7, 7.5, 8, 8.5, 9, 10, 11, 12, 13, 14, 15, 16, 17.
  • Integrated on-chip EJTAG capability.
  • A 64-entry dynamic Trace Buffer for use in real-time trace and debug.
  • Two 32-bit virtually-addressed Watch registers.
  • Integrated performance counters:
    • 2 independent 32-bit counters.
    • Counts over 30 processor events including miss predicted branches.
    • Enables full characterization and analysis of application software.

PACKAGING

  • RM7935 is available in a 128-pin enhanced exposed pad [eePad] package [20 x 20 mm], pin-compatible with the RM5231A and RM7035C exposed pad products.
  • RM7965 package options:
    • 256-pin TBGA package, 27 x 27 mm, pin compatible with RM7065A and RM7065C TBGA products.
    • 216-pin enhanced exposed pad [eePad] package, 24 x 24 mm, pin compatible with the RM5261A and RM7965C exposed pad products.

Applications

  • Voice Gateways
  • Multi-Service Access Platforms
  • DSLAMs/Access Concentrators
  • Remote Access Switches
  • Web Switches
  • Layer 3 Switches
  • Backbone Switches/Routers
  • RAIDs
  • Set Top Boxes
  • Networked Printers
  • Cellular Base Stations
 
 
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