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RM7900
64-bit MIPS RISC Microprocessor with Integrated L2 Cache
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Features
| |
SysAD Bus |
External Cache Controller |
Package |
| RM7900 |
64-bit
| Yes
| 304-pin TBGA
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| RM7965 |
64-bit
| No
| 256-pin TBGA or 216-pin ExposedPad™
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| RM7935 |
32-bit
| No
| 128-pin ExposedPad™
|
- New high performance MIPS64™-compatible Instruction Set Architecture with integrated L2 cache and EJTAG.
- 668, 750 and 835 MHz operating frequency.
- 1753 Dhrystone 2.1 MIPS @ 835 MHz.
- Dual-issue superscalar 7-stage pipeline.
- 16 Kbyte, 4-way set associative L1 Instruction cache.
- 16 Kbyte, 4-way set associative L1 Data cache.
- 256 Kbyte, 4-way set associative L2 cache with industry best 5-cycle access latency.
- Fast Packet Cache to assists processing of packet data.
- 8K entry branch prediction table.
- Fully associative 64-entry TLB with dual pages.
- High-performance Floating Point Unit (IEEE 754).
- Fixed-point DSP instructions such as Multiply/Add, Multiply/Subtract, and 3 Operand Multiply.
- High-performance system interface:
- 64-bit multiplexed address/data bus (SysAD) bus.
- Multiple outstanding reads with out-of-order return.
- 1600 Mbyte/s peak throughput.
- 200 MHz maximum frequency using HSTL signaling on the SysAD bus.
- SysAD bus supports 1.5 V, 2.5 V, 3.3 V I/O logic.
- Processor clock multipliers 2, 3, 3.5, 4, 4.5, 5, 5.5, 6, 6.5, 7, 7.5, 8, 8.5, 9, 10, 11, 12, 13, 14, 15, 16, 17.
- Integrated external cache controller (up to 64 Mbytes):
- User-selectable EZ Cache protocol eliminates the need for external tag RAM.
- Integrated on-chip EJTAG capability.
- A 64-entry dynamic Trace Buffer for use in real-time trace and debug.
- Two 32-bit virtually-addressed Watch registers.
- Integrated performance counters:
- 2 independent 32-bit counters.
- Counts over 30 processor events including miss predicted branches.
- Enables full characterization and analysis of application software.
PACKAGING
- Available in a 304-pin TBGA package, 31 x 31 mm.
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- Pin compatible with RM7000A, RM7000B, and RM7000C products.
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Applications
- Voice Gateways
- Multi-Service Access Platforms
- DSLAMs/Access Concentrators
- Remote Access Switches
- Web Switches
- Layer 3 Switches
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- Backbone Switches/Routers
- RAIDs
- Set Top Boxes
- Networked Printers
- Cellular Base Stations
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RM7900 Microprocessor RM7900 64-bit MIPS RISC Microprocessor with Integrated L2 Cache and EJTAG Short Form Data Sheet [36 KB] PMC-2030269 