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PM5320 ARROW 155
Integrated Metro Access and Transport Framer for 155 Mbit/s

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Version Issue Date

Product Brief

PDFPM5320 ARROW 155 SONET/SDH Interface for 155 Mbit/s Short Form Data Sheet [58 KB] PMC-2030735 2004-11-29 

Data Sheet

Locked Document, Log In RequiredPDFPM5320 ARROW 155 Long Form Data Sheet PMC-2031159 2005-12-13 
Locked Document, Log In RequiredPDFARROW 155 ASSP Telecom Standard Product Register Descriptions [2.46 MB] PMC-2031892 2004-07-12 
Locked Document, Log In RequiredPDFPM5319/PM5320 ARROW 622/155 Operation and Configuration Guide [609 KB] PMC-2030860 2004-07-09 
Locked Document, Log In RequiredPDFPM5319/PM5320 ARROW 622/155 Hardware Design Guide [158 KB] PMC-2030859 2004-07-09 
Locked Document, Log In RequiredText / Binary FileARROW 622 & ARROW 155 Rev A Ball Map [4 KB] PMC-2031854 2004-01-30 

Errata

Locked Document, Log In RequiredPDFArrow 155 Production Release Errata [291 KB] PMC-2071865 2007-12-17 

Software Documentation

Locked Document, Log In RequiredPDFARROW 155 ASSP Telecom Standard Product Register Descriptions [2.46 MB] PMC-2031892 2004-07-12 
Locked Document, Log In RequiredPDFPM5319/PM5320 ARROW 622/155 Operation and Configuration Guide [609 KB] PMC-2030860 2004-07-09 

Models

Locked Document, Log In RequiredPDFINPUT OUTPUT BUFFER INFORMATION SPECIFICATION (IBIS) MODEL FOR THE PM5320 ARROW155 [35 KB] PMC-2040522 2004-04-14 

Symbols/Footprints

Locked Document, Log In RequiredPDFPM5320 ARROW 155 196 CABGA CAD Symbols and Footprints [163 KB] PMC-2041714 2005-06-23 

BSDL Files

Text / Binary FilePM5320 ARROW 155 Rev A Boundary Scan Description Language (BSDL) [22 KB] PMC-2040181 2004-02-12 

Features

SONET/SDH INTERFACE

  • SONET/SDH interface for OC-3/STM-1 (155.52 Mbit/s) rates.
  • Integrated clock recovery & synthesis allows direct interface to low-cost optical transceivers
  • Integrated clock synthesis generates line clock from 77.76 MHz reference
  • Complies with Bellcore, ANSI, and ITU specifications for Jitter Tolerance and Jitter Generation
  • High order path processing and alignment to STS-1/AU-3/TU-3 level
  • Full access to all SONET/SDH Transport overhead bytes via a dedicated serial port
  • Full access to all SONET/SDH STS-1/AU-3/TU-3 path overhead bytes via a dedicated serial port
  • Full access to all DCC bytes via a dedicated serial interface
  • Ring Control port provides real time detection of error conditions and insertion of alarms such as AIS & RDI
  • Section and Path Trace filter and monitor checks for Trace Identifier Mismatch (TIM) and Trace Identifier Unstable (TIU) conditions

DS3/E3/EC-1 INTERFACE

  • Flexible three-port DS3/E3/EC-1 Interface
  • Supports clear channel mapping/demapping of DS3 or E3 into/from STS-1, AU-3, or TU-3
  • Fully digital desynchronizers require no external PLLs for standards-compliant operation
  • Integrated desynchronization CSU allows low rate reference clock at 44.736 MHz, 34.368 MHz, or 51.84 MHz
  • Bi-directional digital jitter attenuation for DS3 and E3 streams allows interfacing to low cost LIUs
  • Full bi-directional performance monitoring for DS3, E3, and EC-1 streams.
  • Full access to DS3/E3/EC-1 Overhead bytes

GENERAL FEATURES

  • Provides an industry standard 8-bit, 77.76 MHz telecombus interface
  • Multi-drop capability allows multiple devices to share the add/drop bus for redundancy or multiplexing purposes
  • Full Time Slot Interchange (TSI) allows flexible mixing of traffic from the SONET/SDH and DS3/E3/EC-1 Interfaces.
  • Supports diagnostic 223-1 pseudo-random bit-sequence (PRBS) generation and monitoring.
  • Provides a standard JTAG test-port for boundary scan board-test purposes.
  • Provides a generic 16-bit microprocessor interface for control and monitoring.
  • 15x15mm 196 ball CABGA package allows for flexible placement and routing

Applications

  • SONET/SDH Add/Drop Multiplexers
  • Terminal Multiplexers
  • Customer Premise Equipment
  • Media Gateways
  • Multiservice Provisioning Platforms
  • Channelized Router Interfaces
  • Digital Cross-Connects
 
 
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