----------------------------------------------------------------------------- -- Copyright (C) 1995-2001 . PMC-Sierra, Inc. All Rights Reserved. -- -- (formerly Quantum Effects Design, Inc.) -- -- -- ----------------------------------------------------------------------------- ----------------------------------------------------------------------------- -- Boundary Scan Description Language (IEEE 1149.1b) -- -- -- -- Device : rm7000, rm7000a, -- -- File Version : 1.20 -- -- File Created : Mon Jan 29 17:00:00 PST 2001 -- -- Package Type : SBGA304 -- ----------------------------------------------------------------------------- -- Revision History: -- -- 1-12-98 1.00 Initial File Created -- -- 10-22-98 1.10 First Release -- -- 1-29-01 1.20 Removed leading 0's on bit vectors, some tools cannot -- -- handle this correctly. -- -- -- ----------------------------------------------------------------------------- -- NOTE: Active low ports are designated with a "B" suffix. -- -- -- -- NOTE: This chip is compliant with the 1149.1 specification. -- -- -- ----------------------------------------------------------------------------- -- This information is provided on an AS IS basis and without warranty. -- -- In no event shall PMC-Sierra, Inc. be liable for incidental -- -- or consequential damages arising from use of this information. This -- -- disclaimer of warranty extends to the user of the information, and to -- -- their customers or users of products and is in lieu of all warranties -- -- whether express, implied, or statutory, including implied warranties of -- -- merchantability or fitness for particular purpose. -- -- -- -- PMC-Sierra, Inc. does not represent or warrant that the -- -- information furnished hereunder is free of infringement of any third -- -- party patents, copyrights, trade secrets, or other intellectual -- -- property rights. PMC-Sierra, Inc. does not represent or -- -- warrant that the information is free of defect, or that it meets any -- -- particular standard, requirements, or need of the user of the -- -- information or their customers. -- -- -- -- PMC-Sierra, Inc. reserves the right to change the -- -- information in this file without notice. -- ----------------------------------------------------------------------------- entity rm7000 is generic (PHYSICAL_PIN_MAP : string := "SBGA304"); port ( JTCK: in bit; JTDI: in bit; JTDO: out bit; JTMS: in bit; BigEndian: in bit; ColdResetB: in bit; ECClrB: out bit; ECCWEB: out bit_vector(1 downto 0); ECDCEB: out bit_vector(1 downto 0); ECDOEB: in bit; ECLine: inout bit_vector(17 downto 0); ECMatch: in bit; ECTCEB: out bit; ECTDEB: out bit; ECTOEB: out bit; ECValid: out bit; ECWord: inout bit_vector(1 downto 0); ECWord_NC: inout bit; ExtRqstB: in bit; IntB: in bit_vector(9 downto 0); MasterClock: in bit; ModeClock: out bit; ModeIn: in bit; NMIB: in bit; PAckB: in bit; PRqstB: out bit; RdRdyB: in bit; RdType: out bit; ReleaseB: out bit; ResetB: in bit; RspSwapB: in bit; SysAD: inout bit_vector(63 downto 0); SysADC: inout bit_vector(7 downto 0); SysCmd: inout bit_vector(8 downto 0); SysCmdP: inout bit; VCCOk: in bit; ValidInB: in bit; ValidOutB: out bit; WrRdyB: in bit; -- The SBGA304 package has 87 VCC, 52 VSS, 1 VCCP, 1 VSSP, 17 NC pins. VCC_SBGA304: linkage bit_vector(86 downto 0); VSS_SBGA304: linkage bit_vector(51 downto 0); VCCP_SBGA304: linkage bit; VSSP_SBGA304: linkage bit; NC_SBGA304: linkage bit_vector(16 downto 0) ); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of rm7000 : entity is "STD_1149_1_1993"; attribute PIN_MAP of rm7000 : entity is PHYSICAL_PIN_MAP; constant SBGA304: PIN_MAP_STRING := "BigEndian: t22, " & "ColdResetB: u23, " & "ECClrB: ab15, " & "ECCWEB: (ac10, ab10 ), " & "ECDCEB: (ac11, ab11 ), " & "ECDOEB: ab17, " & "ECLine: ( g3, f2, " & " f3, e2, d1, e3, a4, b5, c6, d7, " & " d17, c18, b19, a20, f21, g20, e23, f22 ), " & "ECMatch: aa6, " & "ECTCEB: aa15, " & "ECTDEB: ab16, " & "ECTOEB: ac17, " & "ECValid: aa16, " & "ECWord: ( ac9, y10 ), " & "ECWord_NC: aa10, " & "ExtRqstB: t20, " & "JTCK: u4, " & "JTDI: w1, " & "JTDO: v2, " & "JTMS: v3, " & "IntB: ( v21, w22, y23, w21, " & " ac20, ab19, aa18, y17, ac19, ab18 ), " & "MasterClock: aa8, " & "ModeClock: u3, " & "ModeIn: ab5, " & "NMIB: u21, " & "PAckB: u1, " & "PRqstB: t3, " & "RdRdyB: y7, " & "RdType: ac4, " & "ReleaseB: y8, " & "ResetB: u22, " & "RspSwapB: t2, " & "SysAD: ( a15, c15, a17, c17, g22, g23, j22, j23, " & " k22, l21, l23, m21, n21, p23, p21, r22, " & " r3, r1, p2, n4, n1, m3, l2, k1, " & " k3, k4, h2, g1, b6, b7, b9, a9, " & " d14, b16, b17, b18, h21, h22, k20, k21, " & " k23, l22, m22, n23, n20, p22, r23, r21, " & " r2, p3, p1, n3, m2, l1, l3, k2, " & " j1, j2, h3, g2, c7, c8, d10, c10 ), " & "SysADC: ( b13, b14, b10, c11, c13, c14, a10, b11 ), " & "SysCmd: (aa14,ab14,ac14, y13,aa13,ab13,ac13,ab12, " & " aa12 ), " & "SysCmdP: ac15, " & "VCCOk: t21, " & "ValidInB: ab6, " & "ValidOutB: aa7, " & "WrRdyB: ac5, " & "VCC_SBGA304: ( a1, g4, f4, j3, j4, l4, m4, b2, " & " e4, d3, c4, n2, e1, r4, p4, v4, " & " u2, t4, c3, w4, y3, y4, aa9, y6, " & " y11, ab2, ac1, y5, aa4, ab8, y9, y12, " & " y14, y16, ab9, y15, y18, aa3, y19,aa20, " & " aa17, y20, u20, v20, p20, r20, n22,ab22, " & " ac23, w20, y21, d21, m20, l20, w23, j20, " & " j21, v22, f20, h20, g21,aa21, e20, d20, " & " d18, d16, c16, d15, d13, d12, b22, a23, " & " d19, c20, c12, a14, d11, a13, d9, c9, " & " d8, d6, d4, c21, b8, d5, w2 ), " & "VSS_SBGA304: ( c2, f1, b1, h1, aa2, m1, d2, c1, " & " t1, v1, ab1, y2, aa1, ab4, ac6, ab3, " & " ac8, ac2, ac3,ac12,ac16,ab21,ac18,ac22, " & " ab20,ac21, y22,aa22, v23,ab23, t23, c22, " & " aa23, m23, h23, f23, b23, d22, c23, b20, " & " a22, a18, b21, b3, a16, a12, a21, a8, " & " a6, a2, b4, a3 ), " & "VCCP_SBGA304: ab7, " & "VSSP_SBGA304: ac7, " & "NC_SBGA304: ( h4, y1, w3, aa5,aa19,aa11, e22, d23, " & " e21, c19, a19, b15, b12, a11, c5, a7, " & " a5 ) " ; attribute TAP_SCAN_IN of JTDI : signal is true; attribute TAP_SCAN_MODE of JTMS : signal is true; attribute TAP_SCAN_OUT of JTDO : signal is true; attribute TAP_SCAN_CLOCK of JTCK : signal is (20.0e6, BOTH); attribute INSTRUCTION_LENGTH of rm7000 : entity is 3 ; attribute INSTRUCTION_OPCODE of rm7000 : entity is "EXTEST (000)," & "SAMPLE (110)," & "BYPASS (111)," & "PRIVATE001 (001)," & "PRIVATE002 (010)," & "PRIVATE003 (011)," & "PRIVATE004 (100)," & "PRIVATE005 (101)" ; attribute INSTRUCTION_CAPTURE of rm7000 : entity is "001"; attribute INSTRUCTION_PRIVATE of rm7000 : entity is "PRIVATE001 ," & "PRIVATE002 ," & "PRIVATE003 ," & "PRIVATE004 ," & "PRIVATE005 " ; attribute REGISTER_ACCESS of rm7000 : entity is "BYPASS(BYPASS)"; -- attribute BOUNDARY_CELLS of rm7000 : entity is -- "BC_1, BC_2, BC_4, BC_7"; attribute BOUNDARY_LENGTH of rm7000 : entity is 260; -- PORT DESCRIPTION TERMS -- -------------------------------------------- -- cell type: BC-1 output only data bit -- BC_2 oe control bit -- BC_4 input data bit -- BC_7 bidirectional data bit -- port: port name with index if port description says bit_vector -- function -- input: input only -- bidir: bidirectional -- control: control cell -- output3: three state output -- safe: value in control cell to make input = 0 for bidir and control -- ccell: controlling cell number for I/O direction -- dsval: disabling (input) value -- rslt: result if disabled (input = Z) -- tdo = first cell shifted in during ShifDR -- num cell port function safe ccell dsval rslt attribute BOUNDARY_REGISTER of rm7000 : entity is "0 (BC_1, ModeClock, output3, 0, 1, 0, Z), "& "1 (BC_2, *, control, 0), "& "2 (BC_1, PRqstB, output3, 0, 3, 0, Z), "& "3 (BC_2, *, control, 0), "& "4 (BC_4, PAckB, input, X), "& "5 (BC_4, RspSwapB, input, X), "& "6 (BC_7, SysAD(47), bidir, 0, 7, 0, Z), "& "7 (BC_2, *, control, 0), "& "8 (BC_7, SysAD(15), bidir, 0, 9, 0, Z), "& "9 (BC_2, *, control, 0), "& "10 (BC_7, SysAD(46), bidir, 0, 11, 0, Z), "& "11 (BC_2, *, control, 0), "& "12 (BC_7, SysAD(14), bidir, 0, 13, 0, Z), "& "13 (BC_2, *, control, 0), "& "14 (BC_7, SysAD(45), bidir, 0, 15, 0, Z), "& "15 (BC_2, *, control, 0), "& "16 (BC_7, SysAD(13), bidir, 0, 17, 0, Z), "& "17 (BC_2, *, control, 0), "& "18 (BC_7, SysAD(44), bidir, 0, 19, 0, Z), "& "19 (BC_2, *, control, 0), "& "20 (BC_7, SysAD(12), bidir, 0, 21, 0, Z), "& "21 (BC_2, *, control, 0), "& "22 (BC_7, SysAD(43), bidir, 0, 23, 0, Z), "& "23 (BC_2, *, control, 0), "& "24 (BC_7, SysAD(11), bidir, 0, 25, 0, Z), "& "25 (BC_2, *, control, 0), "& "26 (BC_7, SysAD(42), bidir, 0, 27, 0, Z), "& "27 (BC_2, *, control, 0), "& "28 (BC_7, SysAD(10), bidir, 0, 29, 0, Z), "& "29 (BC_2, *, control, 0), "& "30 (BC_7, SysAD(41), bidir, 0, 31, 0, Z), "& "31 (BC_2, *, control, 0), "& "32 (BC_7, SysAD(9), bidir, 0, 33, 0, Z), "& "33 (BC_2, *, control, 0), "& "34 (BC_7, SysAD(40), bidir, 0, 35, 0, Z), "& "35 (BC_2, *, control, 0), "& "36 (BC_7, SysAD(8), bidir, 0, 37, 0, Z), "& "37 (BC_2, *, control, 0), "& "38 (BC_7, SysAD(39), bidir, 0, 39, 0, Z), "& "39 (BC_2, *, control, 0), "& "40 (BC_7, SysAD(7), bidir, 0, 41, 0, Z), "& "41 (BC_2, *, control, 0), "& "42 (BC_7, SysAD(38), bidir, 0, 43, 0, Z), "& "43 (BC_2, *, control, 0), "& "44 (BC_7, SysAD(6), bidir, 0, 45, 0, Z), "& "45 (BC_2, *, control, 0), "& "46 (BC_7, SysAD(37), bidir, 0, 47, 0, Z), "& "47 (BC_2, *, control, 0), "& "48 (BC_7, SysAD(5), bidir, 0, 49, 0, Z), "& "49 (BC_2, *, control, 0), "& "50 (BC_7, SysAD(36), bidir, 0, 51, 0, Z), "& "51 (BC_2, *, control, 0), "& "52 (BC_7, SysAD(4), bidir, 0, 53, 0, Z), "& "53 (BC_2, *, control, 0), "& "54 (BC_7, ECLine(17), bidir, 0, 55, 0, Z), "& "55 (BC_2, *, control, 0), "& "56 (BC_7, ECLine(16), bidir, 0, 57, 0, Z), "& "57 (BC_2, *, control, 0), "& "58 (BC_7, ECLine(15), bidir, 0, 59, 0, Z), "& "59 (BC_2, *, control, 0), "& "60 (BC_7, ECLine(14), bidir, 0, 61, 0, Z), "& "61 (BC_2, *, control, 0), "& "62 (BC_7, ECLine(13), bidir, 0, 63, 0, Z), "& "63 (BC_2, *, control, 0), "& "64 (BC_7, ECLine(12), bidir, 0, 65, 0, Z), "& "65 (BC_2, *, control, 0), "& "66 (BC_7, ECLine(11), bidir, 0, 67, 0, Z), "& "67 (BC_2, *, control, 0), "& "68 (BC_7, ECLine(10), bidir, 0, 69, 0, Z), "& "69 (BC_2, *, control, 0), "& "70 (BC_7, ECLine(9), bidir, 0, 71, 0, Z), "& "71 (BC_2, *, control, 0), "& "72 (BC_7, ECLine(8), bidir, 0, 73, 0, Z), "& "73 (BC_2, *, control, 0), "& "74 (BC_7, SysAD(35), bidir, 0, 75, 0, Z), "& "75 (BC_2, *, control, 0), "& "76 (BC_7, SysAD(3), bidir, 0, 77, 0, Z), "& "77 (BC_2, *, control, 0), "& "78 (BC_7, SysAD(34), bidir, 0, 79, 0, Z), "& "79 (BC_2, *, control, 0), "& "80 (BC_7, SysAD(2), bidir, 0, 81, 0, Z), "& "81 (BC_2, *, control, 0), "& "82 (BC_7, SysAD(33), bidir, 0, 83, 0, Z), "& "83 (BC_2, *, control, 0), "& "84 (BC_7, SysAD(1), bidir, 0, 85, 0, Z), "& "85 (BC_2, *, control, 0), "& "86 (BC_7, SysAD(32), bidir, 0, 87, 0, Z), "& "87 (BC_2, *, control, 0), "& "88 (BC_7, SysAD(0), bidir, 0, 89, 0, Z), "& "89 (BC_2, *, control, 0), "& "90 (BC_7, SysADC(5), bidir, 0, 91, 0, Z), "& "91 (BC_2, *, control, 0), "& "92 (BC_7, SysADC(1), bidir, 0, 93, 0, Z), "& "93 (BC_2, *, control, 0), "& "94 (BC_7, SysADC(4), bidir, 0, 95, 0, Z), "& "95 (BC_2, *, control, 0), "& "96 (BC_7, SysADC(0), bidir, 0, 97, 0, Z), "& "97 (BC_2, *, control, 0), "& "98 (BC_7, SysADC(7), bidir, 0, 99, 0, Z), "& "99 (BC_2, *, control, 0), "& "100 (BC_7, SysADC(3), bidir, 0, 101, 0, Z), "& "101 (BC_2, *, control, 0), "& "102 (BC_7, SysADC(6), bidir, 0, 103, 0, Z), "& "103 (BC_2, *, control, 0), "& "104 (BC_7, SysADC(2), bidir, 0, 105, 0, Z), "& "105 (BC_2, *, control, 0), "& "106 (BC_7, SysAD(63), bidir, 0, 107, 0, Z), "& "107 (BC_2, *, control, 0), "& "108 (BC_7, SysAD(31), bidir, 0, 109, 0, Z), "& "109 (BC_2, *, control, 0), "& "110 (BC_7, SysAD(62), bidir, 0, 111, 0, Z), "& "111 (BC_2, *, control, 0), "& "112 (BC_7, SysAD(30), bidir, 0, 113, 0, Z), "& "113 (BC_2, *, control, 0), "& "114 (BC_7, SysAD(61), bidir, 0, 115, 0, Z), "& "115 (BC_2, *, control, 0), "& "116 (BC_7, SysAD(29), bidir, 0, 117, 0, Z), "& "117 (BC_2, *, control, 0), "& "118 (BC_7, SysAD(60), bidir, 0, 119, 0, Z), "& "119 (BC_2, *, control, 0), "& "120 (BC_7, SysAD(28), bidir, 0, 121, 0, Z), "& "121 (BC_2, *, control, 0), "& "122 (BC_7, ECLine(7), bidir, 0, 123, 0, Z), "& "123 (BC_2, *, control, 0), "& "124 (BC_7, ECLine(6), bidir, 0, 125, 0, Z), "& "125 (BC_2, *, control, 0), "& "126 (BC_7, ECLine(5), bidir, 0, 127, 0, Z), "& "127 (BC_2, *, control, 0), "& "128 (BC_7, ECLine(4), bidir, 0, 129, 0, Z), "& "129 (BC_2, *, control, 0), "& "130 (BC_7, ECLine(3), bidir, 0, 131, 0, Z), "& "131 (BC_2, *, control, 0), "& "132 (BC_7, ECLine(2), bidir, 0, 133, 0, Z), "& "133 (BC_2, *, control, 0), "& "134 (BC_7, ECLine(1), bidir, 0, 135, 0, Z), "& "135 (BC_2, *, control, 0), "& "136 (BC_7, ECLine(0), bidir, 0, 137, 0, Z), "& "137 (BC_2, *, control, 0), "& "138 (BC_7, SysAD(59), bidir, 0, 139, 0, Z), "& "139 (BC_2, *, control, 0), "& "140 (BC_7, SysAD(27), bidir, 0, 141, 0, Z), "& "141 (BC_2, *, control, 0), "& "142 (BC_7, SysAD(58), bidir, 0, 143, 0, Z), "& "143 (BC_2, *, control, 0), "& "144 (BC_7, SysAD(26), bidir, 0, 145, 0, Z), "& "145 (BC_2, *, control, 0), "& "146 (BC_7, SysAD(57), bidir, 0, 147, 0, Z), "& "147 (BC_2, *, control, 0), "& "148 (BC_7, SysAD(25), bidir, 0, 149, 0, Z), "& "149 (BC_2, *, control, 0), "& "150 (BC_7, SysAD(56), bidir, 0, 151, 0, Z), "& "151 (BC_2, *, control, 0), "& "152 (BC_7, SysAD(24), bidir, 0, 153, 0, Z), "& "153 (BC_2, *, control, 0), "& "154 (BC_7, SysAD(55), bidir, 0, 155, 0, Z), "& "155 (BC_2, *, control, 0), "& "156 (BC_7, SysAD(23), bidir, 0, 157, 0, Z), "& "157 (BC_2, *, control, 0), "& "158 (BC_7, SysAD(54), bidir, 0, 159, 0, Z), "& "159 (BC_2, *, control, 0), "& "160 (BC_7, SysAD(22), bidir, 0, 161, 0, Z), "& "161 (BC_2, *, control, 0), "& "162 (BC_7, SysAD(53), bidir, 0, 163, 0, Z), "& "163 (BC_2, *, control, 0), "& "164 (BC_7, SysAD(21), bidir, 0, 165, 0, Z), "& "165 (BC_2, *, control, 0), "& "166 (BC_7, SysAD(52), bidir, 0, 167, 0, Z), "& "167 (BC_2, *, control, 0), "& "168 (BC_7, SysAD(20), bidir, 0, 169, 0, Z), "& "169 (BC_2, *, control, 0), "& "170 (BC_7, SysAD(51), bidir, 0, 171, 0, Z), "& "171 (BC_2, *, control, 0), "& "172 (BC_7, SysAD(19), bidir, 0, 173, 0, Z), "& "173 (BC_2, *, control, 0), "& "174 (BC_7, SysAD(50), bidir, 0, 175, 0, Z), "& "175 (BC_2, *, control, 0), "& "176 (BC_7, SysAD(18), bidir, 0, 177, 0, Z), "& "177 (BC_2, *, control, 0), "& "178 (BC_7, SysAD(49), bidir, 0, 179, 0, Z), "& "179 (BC_2, *, control, 0), "& "180 (BC_7, SysAD(17), bidir, 0, 181, 0, Z), "& "181 (BC_2, *, control, 0), "& "182 (BC_7, SysAD(48), bidir, 0, 183, 0, Z), "& "183 (BC_2, *, control, 0), "& "184 (BC_7, SysAD(16), bidir, 0, 185, 0, Z), "& "185 (BC_2, *, control, 0), "& "186 (BC_4, BigEndian, input, X), "& "187 (BC_4, VCCOk, input, X), "& "188 (BC_4, ColdResetB, input, X), "& "189 (BC_4, ResetB, input, X), "& "190 (BC_4, ExtRqstB, input, X), "& "191 (BC_4, NMIB, input, X), "& "192 (BC_4, IntB(9), input, X), "& "193 (BC_4, IntB(8), input, X), "& "194 (BC_4, IntB(7), input, X), "& "195 (BC_4, IntB(6), input, X), "& "196 (BC_4, IntB(5), input, X), "& "197 (BC_4, IntB(4), input, X), "& "198 (BC_4, IntB(3), input, X), "& "199 (BC_4, IntB(2), input, X), "& "200 (BC_4, IntB(1), input, X), "& "201 (BC_4, IntB(0), input, X), "& "202 (BC_4, ECDOEB, input, X), "& "203 (BC_1, ECValid, output3, 0, 204, 0, Z), "& "204 (BC_2, *, control, 0), "& "205 (BC_1, ECTOEB, output3, 0, 206, 0, Z), "& "206 (BC_2, *, control, 0), "& "207 (BC_1, ECTDEB, output3, 0, 208, 0, Z), "& "208 (BC_2, *, control, 0), "& "209 (BC_1, ECTCEB, output3, 0, 210, 0, Z), "& "210 (BC_2, *, control, 0), "& "211 (BC_1, ECClrB, output3, 0, 212, 0, Z), "& "212 (BC_2, *, control, 0), "& "213 (BC_7, SysCmdP, bidir, 0, 214, 0, Z), "& "214 (BC_2, *, control, 0), "& "215 (BC_7, SysCmd(8), bidir, 0, 216, 0, Z), "& "216 (BC_2, *, control, 0), "& "217 (BC_7, SysCmd(7), bidir, 0, 218, 0, Z), "& "218 (BC_2, *, control, 0), "& "219 (BC_7, SysCmd(6), bidir, 0, 220, 0, Z), "& "220 (BC_2, *, control, 0), "& "221 (BC_7, SysCmd(5), bidir, 0, 222, 0, Z), "& "222 (BC_2, *, control, 0), "& "223 (BC_7, SysCmd(4), bidir, 0, 224, 0, Z), "& "224 (BC_2, *, control, 0), "& "225 (BC_7, SysCmd(3), bidir, 0, 226, 0, Z), "& "226 (BC_2, *, control, 0), "& "227 (BC_7, SysCmd(2), bidir, 0, 228, 0, Z), "& "228 (BC_2, *, control, 0), "& "229 (BC_7, SysCmd(1), bidir, 0, 230, 0, Z), "& "230 (BC_2, *, control, 0), "& "231 (BC_7, SysCmd(0), bidir, 0, 232, 0, Z), "& "232 (BC_2, *, control, 0), "& "233 (BC_1, ECDCEB(1), output3, 0, 234, 0, Z), "& "234 (BC_2, *, control, 0), "& "235 (BC_1, ECDCEB(0), output3, 0, 236, 0, Z), "& "236 (BC_2, *, control, 0), "& "237 (BC_1, ECCWEB(1), output3, 0, 238, 0, Z), "& "238 (BC_2, *, control, 0), "& "239 (BC_1, ECCWEB(0), output3, 0, 240, 0, Z), "& "240 (BC_2, *, control, 0), "& "241 (BC_7, ECWord_NC, bidir, 0, 242, 0, Z), "& "242 (BC_2, *, control, 0), "& "243 (BC_7, ECWord(1), bidir, 0, 244, 0, Z), "& "244 (BC_2, *, control, 0), "& "245 (BC_7, ECWord(0), bidir, 0, 246, 0, Z), "& "246 (BC_2, *, control, 0), "& "247 (BC_4, MasterClock, input, X), "& "248 (BC_1, ReleaseB, output3, 0, 249, 0, Z), "& "249 (BC_2, *, control, 0), "& "250 (BC_1, ValidOutB, output3, 0, 251, 0, Z), "& "251 (BC_2, *, control, 0), "& "252 (BC_4, ValidInB, input, X), "& "253 (BC_4, WrRdyB, input, X), "& "254 (BC_4, RdRdyB, input, X), "& "255 (BC_4, ECMatch, input, X), "& "256 (BC_4, ModeIn, input, X), "& "257 (BC_1, RdType, output3, 0, 258, 0, Z), "& "258 (BC_2, *, control, 0), "& "259 (BC_4, *, internal, X) "; -- tdi = last cell shifted in during ShiftDR end rm7000;